1. Field of the Invention
This invention relates to method and arrangements for equalizing the pulse widths of spike-free digital signals using an auxiliary data clock and also for the suppressing potentially occurring spikes.
2. Description of Related Art
The following publications show various electronic digital circuits for controlling the pulse widths and other characteristics. U.S. Pat. No. 4,233,525, U.S. Pat. No. 4,554,445, British Patent 1,278,373, Patent Abstracts of Japan Vol. 5, Number 86(E-60) (758) Jun. 5, 1981, German DE 3,239,936 and German 2,037,161.
An auxiliary data clock is available in integrated arrangements for recovery of the clock and/or of the clock phase of a synchronous or plesiochronous digital signal, for example in digital signal multiplex equipment or distributing multiplexers according to an earlier disclosure U.S. Pat. No. 4,841,548. A plurality of such integrated arrangements require only one crystal oscillator. The auxiliary clock pulse DHT can be obtained either from a clock pulse recovery unit which may contain a voltage-controlled oscillator VCO or a local oscillator of a fixed frequency and a phase shifting unit or it may be obtained from the transmitter which transmits it with the data.
Higher demands are made of the tolerances of pulse widths of digital signals which are equalized in line balancers for digital clock recovery equipment than are made for analog clock recovery equipment. It may be necessary therefore to equalize again the pulse widths.